The present invention relates generally to phased array radar and communication systems, and more specifically to a method of placing a low sidelobe amplitude taper on phased array antennas.
Modern communications and radar systems need high performance antennas to cope with electromagnetic interference. These antennas are required to produce narrow beams and low sidelobes, and operate over a wide range of frequencies and scan angles. In addition, these antennas must reduce unwanted signals entering the main beam and/or sidelobes. The increasing problems with electromagnetic interference motivates system engineers to build antennas with these features.
In the past, reflector antennas were a more practical alternative to the phased array. Hence, large aperture and low sidelobe antennas were usually reflectors. Today, however, low sidelobes and a narrow bandwidth are not sufficient to cope with electromagnetic interference. Since modern antennas must also have wide bandwidth, wide scan angles, adaptive pattern control, and in some applications the ability to conform to the surface of a structure, a phased array is a preferred antenna in many radar and communications systems.
The antennas of phased array radar and communication systems are composed of an array of antenna elements. Each element receives signals from the environment. The phase shifters change the phase of the received signals in such a way that the signals from a given direction all add in phase. After the phase shifters, the signals pass through an amplitude weight where the amplitudes of the signals are changed. The signals from the elements are then added together at the subarray ports. From there the combined signals are amplitude weighted, then added together to form one output signal.
In order to reduce the effects of electromagnetic interference, the amplitude of the signals are weighted in such a way that the far field antenna pattern ahs low sidelobes. Low sidelobes helps the antenna reject all signals, except those entering the mainbeam. Thus, jamming signals entering the sidelobes are rejected. Low sidelobes are very important for radar systems, because of the interference rejection capability. Most phased array antennas currently use amplitude tapering to get the low sidelobes.
Two techniques are available for performing amplitude tapering for generating low sidelobes in the far field pattern of a large array. The first of these techniques entails performing an exact amplitude taper at each of the individual elements in the phased array.
While an exact amplitude taper at each of the individual elements produces the best sidelobes, it also requires complex feed architectures. Such complicated feed architectures are expensive to design, build, test and maintain.
The second technique available for amplitude tapering entails amplitude tapering only at the subarray outputs. While the antenna architecture of systems using this second technique are much simpler, undesirable grating lobes are produced in the far field antenna pattern.
In view of the foregoing discussion, it is apparent that there currently exists the need for a technique for placing a low sidelobe amplitude taper at the subarray port of a phased array without inducing large undesirable grating lobes. The present invention is directed towards satisfying that need.